Digital Receivers Meeting: A Summary
By Reinhard Keller, MPIfR Bonn, Member SOC
The first workshop on Digital Receivers was held on 23 April 2007 at the Insituto di Radioastronomia in Bologna, Italy. This meeting was the sixth in a series of engineering workshops sponsored and organized by the EU Consortium RadioNet within the Sixth Framework Program of the European Commission.
It was a pleasure for the conference summariser to review this day with interestin challenging and brand new developments presented. The workshop gave a broad view of various developments at different institutions related to digital receivers.
The morning session was mainly dominated by hardware tailored ore suitable for the use in digital receivers. It becomes clear that a broad variety of printed circuit boards based on Field Programmable Gate Array (FPGA) chips can be used to sample and process analogue signals directly at the receiver site. These FPGAs, have got bigger, faster and better in the last years and allowing a bunch of functions applied on the time series data up to the Giga-Hertz sector today. Since FPGA chips are available as commercial of the shelf and very popular in the communication business, this new technique is independent from customer designed chips and therefore allows a faster enhance in developing systems with larger bandwidth and increased spectral resolution. In parallel it is now possible to use very fast multi-level analogue-to-digital converters (ADCs) resulting in an increased system sensitivity. In addition, the higher input dynamic range of the ADCs degrades the complexity of the IF-processing. Also the steady increase of speed of the ADCs yealds to increasing bandwidth which makes it possible ot get many GHz of bandwidth accessed and processed instantainiously in the future. Talks by Gino Tucarri, Reinhard Keller and Dick Ferris gave examples for actually built up receivers. Authors from the MPI fro Radioastronomy also adressed a strong emphasis on suppression of RFI produced by the digital hardware itself. The afternoon session showed some examples for receiver related topics using the same hardware. It was interesting that many contributions began with the words: "We use a fast ADC linked to a big FPGA to process the sampled data...". It becomes clear that this new type of backend is appropriate for the use in digital receivers.
I'd like to close by saying what a pleasure it was to participate this very interesting workshop. Not only because of all the new developments in Digital Receivers discussed, but also because of the good organisation of the whole day and the comfortable workshop dinner.
On behalf of all of the participants, I'd like to thank all the members of the Local Organising Committee for their great job.